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To study how chips work, MIT researchers built their own operating system

news.mit.edu|310 points|47 comments|by speckx|Jun 15, 2026

Engineering an "Electron Microscope" for CPUs: MIT's Fractal Kernel

Researchers at MIT have developed a specialized operating system kernel to peel back the curtain on processor architecture. By creating Fractal, the team at the Computer Science and Artificial Intelligence Laboratory (CSAIL) now has a tool capable of observing hardware behaviors that were previously invisible.

The Problem: The "Noise" of General-Purpose OSs

Traditionally, security experts analyzing processor vulnerabilities (like the infamous Spectre or Meltdown) have had to rely on standard operating systems. This process is fraught with difficulty:

  • Using macOS or Linux as a research base
  • Manually patching kernels to force specific behaviors
  • Hoping the system remains stable during execution

Because general-purpose OSs manage their own scheduling, address spaces, and privilege levels, they inject significant "noise" into measurements. This makes it nearly impossible to get a clean signal of what the hardware is doing.

"If you’ve got a hand magnifying glass, you can see a little bit. But if you had an electron microscope, now we’re really talking. The electron microscope of operating systems," explains Joseph Ravichandran, the lead author and MIT PhD student.


Introducing Fractal

Fractal is not meant for daily computing; it is a tool where the hardware itself is the subject of the experiment. It boots on "bare metal," eliminating background interference.

Key Technical Innovation: Multi-Privilege Concurrency

The breakthrough in Fractal is a concept called multi-privilege concurrency. This is achieved through a new architectural element: the outer kernel thread.

The Logic: The outer kernel thread resides within the memory of a user process but operates with full kernel-level permissions. This allows researchers to switch privilege levels PrivilegeuserPrivilegekernel\text{Privilege}_{user} \rightarrow \text{Privilege}_{kernel} while maintaining the same instructions and address space.

Research Objectives

The team utilized Fractal to achieve the following:

  • Eliminate scheduler-induced noise.
  • Create flat baselines for hardware measurements.
  • Study branch predictors in isolation.
  • Test privilege boundary leaks.

Case Study: Probing the Apple M1

The researchers applied Fractal to the Apple M1 chip, specifically focusing on branch predictors (the mechanism CPUs use to guess future code paths to save time).

The CSV2 Specification

Apple's M1 uses an ARM standard known as CSV2. The goal of CSV2 is to ensure that code in one privilege level cannot influence the speculative execution of another.

FeatureObservation via FractalResult
Indirect Branch PredictionUser-mode cannot steer kernel speculative targets.\checkmark Protected
Instruction Cache FetchTarget is fetched into cache before protection triggers.×\times Vulnerable

The "Phantom" Discovery

While the execution stage of the branch prediction is protected, the team discovered a nuance: the CPU still fetches the target into the instruction cache. This observable "leak" provides the first concrete evidence that a specific class of speculative attacks, known as "Phantom," can indeed affect Apple Silicon.

Conceptual Logic of the Leak:

If we define the protection trigger as TT and the cache fetch as FF, the researchers found that: F<TF < T (The fetch occurs before the protection is enforced).

// Conceptual representation of the observed behavior
void speculative_probe() {
    // 1. Trigger branch prediction
    // 2. Hardware fetches target to cache (OBSERVABLE)
    // 3. CSV2 protection kicks in (BLOCKS EXECUTION)
    // Result: Target is in cache despite not being executed.
}

Hardware Research Concept Figure 1: Conceptual visualization of how Fractal isolates hardware signals from OS noise.

By treating the processor as a laboratory specimen rather than just a component, the MIT team has provided a new blueprint for how we verify the security and efficiency of modern silicon.