MSAP-2 Simulator: A Virtualized Discrete Logic 8-Bit Computer

The MSAP-2 Simulator is a specialized tool designed to emulate a custom-built 8-bit computer constructed from discrete logic components (such as 74-series TTL chips). Rather than simulating a high-level processor, this project focuses on the granular interaction of gates and flip-flops, providing a transparent look at how hardware actually executes instructions.

📌 Project Overview

The primary goal of the MSAP-2 is educational. It aims to bridge the gap between theoretical computer architecture and physical implementation. Instead of spending hundreds of dollars on physical breadboards and thousands of wires software simulation, users can experiment with a fully functional CPU architecture in their browser.

"The beauty of discrete logic is that there are no 'black boxes.' Every bit movement is the result of a specific voltage change across a logic gate."

🛠️ Core Specifications

The system architecture is designed for simplicity and clarity:

• Data Width: 8-bit
• Address Bus: 16-bit (allowing for a larger memory map)
• Logic Base: Emulated TTL (Transistor-Transistor Logic)
• Clocking: Synchronous stepping

The total addressable memory can be calculated using the formula: $\text{Total Memory} = 2^{16} = 65,536 \text{ bytes}$

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⚙️ How the CPU Operates

The MSAP-2 follows the classic Fetch-Decode-Execute cycle. The following diagram illustrates the flow of a single clock cycle:

📋 Instruction Set Architecture (ISA)

The computer utilizes a custom set of opcodes. Below is a sample of the available instructions:

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💻 Programming the MSAP-2

Users can write assembly code, which is then assembled into machine code for the simulator. For example, a simple program to add two numbers might look like this:

; Simple Addition Program
LDA 0x1000  ; Load value from address 0x1000 into Acc
ADD 0x1001  ; Add value from address 0x1001 to Acc
STA 0x1002  ; Store result in address 0x1002
HLT         ; Halt execution

To run a program, the user must:

• Write the assembly source code.
• Assemble the code into binary/hex.
• Load the binary into the simulator's memory.
• Set the Program Counter (PC) to the start address.
• (Optional) Debug using the step-through feature.

🖼️ Visual Interface

The simulator provides a real-time visual representation of the hardware state.

By monitoring the Accumulator, Instruction Register, and Status Flags, users can see exactly how an ADD instruction affects the zero flag or how a JMP instruction modifies the PC.

🚀 Key Features Summary

1. Cycle-Accurate Simulation: Every clock tick is accounted for.
2. Memory Inspection: View and edit RAM/ROM in real-time.
3. Logic Visualization: See which control lines are HIGH or LOW.
4. Custom Assembler: Convert human-readable mnemonics to 0s and 1s.