Celebrating Half a Century of the Zilog Z80

Introduction

As of this writing, the Zilog Z80 processor has officially reached its 50th anniversary, having launched in July 1976. To put this timeline into perspective, the Z80 arrived:

• Less than four years after the final moonwalk.
• Closer to the end of World War II than to the current year.
• Roughly midway between the assassination of JFK and the collapse of the Berlin Wall.
• Closer to the start of the Korean War than to the events of 9/11 which happened a quarter-century ago (Sorry).

The Z80 was a monumental success, powering a vast array of 8-bit microcomputers, early PCs, and hobbyist machines, as well as countless industrial and embedded systems. Alongside the binary-compatible 8080 and 8085, it established a de facto hardware standard for 8-bit computing, which in turn paved the way for software standards like Microsoft BASIC and CP/M.

The Z80's influence extended through various clones and evolved architectures—most notably the Sharp LR35902, the heart of the original GameBoy. While Zilog eventually abandoned its 16-bit and 32-bit ventures, they returned to their roots with Z80-based microcontrollers and the high-clocked, pipelined eZ80 for industrial use.

Note: Although Zilog only discontinued the original Z80 about two years ago, its presence in industrial hardware means it is still very much "alive" in the wild.

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A Personal Journey into Silicon

I was born too late to experience the Z80's heyday in home computing (excluding the GameBoy), but I discovered it as a teenager while browsing an electronics catalog. I was shocked to see it still for sale. This led me to build my own Z80-based computer, utilizing a school photo lab at night to etch my own PCBs.

This project sparked conversations with teachers who shared tales of early computing, including a story about a DIY wire-wrap machine housed in a Tupperware box. That machine ran WordStar and CP/M via a "borrowed" IBM terminal to write a thesis.

Eventually, I acquired a collection of "dusty drawer" chips for my projects:

• MCS-85 components
• Z80 and 8085 CPUs
• 6502 and 6522 chips

Through this, I learned several hard truths about systems engineering:

• Writing a compiler is actually achievable.
• Writing a linker is significantly more difficult than writing an assembler.
• Creating a reliable power-on reset is surprisingly complex.

While I intended to focus on a technical comparison between the Z80 and the 8080, a dive into the Computer History Museum's oral histories turned this into a much larger exploration of the Z80's ancestry.

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The Lineage: From the 2200 to the 8008

The story begins with the Computer Terminal Corporation (CTC) and their Datapoint 2200, a programmable terminal using an 8-bit processor made of discrete TTL chips. Intel provided the memory chips and shift registers.

The goal was to replace the "TTL cemetery" with custom integrated circuits (ICs), eventually aiming for a single-chip CPU. Two firms were hired: Texas Instruments (TI) and Intel.

By the time Intel finished the chip (originally called the 1201), CTC was already selling the TTL version and had modified the architecture for the next generation. While TI scrapped their effort, Intel marketed their version as the 8008.

The 8008 Architecture

The 8008's design was unique and constrained. Below is a conceptual representation of its pinout:

       ___ ___ 
  -9V ---| 1 |_| 18|
        | 2   17|
        | 3   16|
        | 4   15|-> SYNC  __ AD3
        | 5   14|-> S0     | AD2
        | 6   13|-> S1     | AD1
        | 7   12|-> S2     | AD0
        | 8   11|-- +5V    |
        |_________|

Register Set & Memory Access The 8008 utilizes 7 primary registers:

Technical Specifications

• ALU State: Tracked via flags: Carry, Parity, Zero, and Sign.
• Program Counter (PC): Not directly accessible.
• Address Space: Memory addresses are $2^{14}$ (14 bits wide).
• I/O Space: A separate space containing 32 ports, where addresses are immediate and "bit-stuffed" into the opcode.

The Stack and Interrupts Because the Datapoint 2200 was designed for serial memory, a memory-based call stack was feared to be a bottleneck. Consequently, the 8008 uses an internal return address stack only 8 levels deep.

Interrupts are handled via "restart" (RST) instructions. There are 8 available slots: 0x00, 0x08, 0x10, 0x18, 0x20, 0x28, 0x30, 0x38

When an interrupt triggers:

1. The CPU signals the peripheral.
2. It executes whatever is currently on the data bus (which must be an RST instruction).

The major limitation here is the lack of a general-purpose stack to save registers. Since all memory access requires HL, but the interrupt handler cannot clobber HL, a specific workaround was required...