Editor's Note: This piece was originally slated for the September 1998 edition of BYTE Magazine. However, following BYTE's closure in June 1998, the article was instead published in C'T (a German publication) and Windows NT Magazine. This version represents the original English text.

The Alpha 21264 CPU: NT's Greatest RISC (1998)

As the industry anticipates the arrival of Microsoft's 64-bit Windows NT and Intel's Merced processor, Digital Equipment is providing a glimpse into the future of NT processing via the Alpha 21264.

The 21264 represents the newest iteration of the Alpha microprocessor line. Digital aims for clock speeds exceeding $700\text{ MHz}$ within the current year, ensuring the Alpha maintains the "speed demon" status previously established by the 21064 and 21164 models.

The State of NT Architecture

Currently, Alpha stands as the final RISC architecture for which Microsoft is actively developing future NT versions. The landscape is shifting:

• MIPS Rx000: Being phased out by Microsoft.
• PowerPC: The NT port never gained significant traction.
• Intel x86: The dominant market force.

While Intel owns the market, the Alpha provides a critical advantage: raw performance, particularly regarding floating-point operations. Although Alpha-based systems typically carry a higher price tag than x86 machines, they are vastly superior for scientific and engineering workloads that require heavy mathematical computation.

The Race to 64-Bit: Alpha vs. IA-64

To overcome the inherent bottlenecks of the aging x86 architecture, Intel teamed up with HP in 1994 to create the Intel Architecture-64 (IA-64). The first implementation of this, the Merced chip, is expected to ship around mid-2000.

However, the Merced may not be the fastest option available. Digital claims that by the time Merced launches, the 21264 will hit a clock frequency of $1000\text{ MHz}$ (or $1\text{ GHz}$).

While 21264 systems are arriving in late 1998, the hardware cannot reach its full potential until Microsoft releases the 64-bit version of NT (targeted for 2000).

Whither RISC?

The competition between the 21264 and IA-64 is more than just a speed contest; it is a battle for the survival of RISC in the general OS market. Outside of embedded systems, RISC is currently in retreat.

The RISC Landscape

1. PowerPC (IBM/Motorola): The most popular desktop RISC, yet its primary user, Apple, holds only about 4% of the PC market (per IDC).
   • Update: IBM and Motorola are ending their 7-year partnership to develop chips independently.
   • Integration: IBM is merging its Power series with PowerPC, resulting in the 64-bit Power3.
2. MIPS (Silicon Graphics): SGI is abandoning the Rx000 series, canceling next-gen projects, and spinning off MIPS's embedded division. SGI is now moving toward x86 for NT and IA-64 for IRIX.
3. SPARC (Sun): Despite Sun's denials, analysts suggest the UltraSPARC-III might be the final major generation.
4. PA-RISC (HP): HP is transitioning HP-UX to IA-64.

The Corporate Tug-of-War

The Alpha is the performance leader, but Digital's internal instability creates uncertainty. Digital sold its Hudson, Massachusetts foundry to Intel—though it is important to note that Digital sold the factory, not the Alpha architecture itself.

Digital continues to design the chips but relies on external fabrication:

• Current Licensees: Samsung and Mitsubishi.
• Potential Partners: Negotiations are ongoing with IBM Microelectronics and AMD.

Mitsubishi is not currently producing the 21264, though they support the budget-friendly 21164PC. However, a new Mitsubishi subsidiary intends to push the 21264 toward the $1\text{ GHz}$ mark by 2000.

The Compaq Factor

The acquisition of Digital by Compaq adds another layer of complexity, as Compaq is a massive customer of Intel's x86 line. However, David Jessel, the senior product manager for Alpha, remains optimistic:

"Compaq has been fully supportive of the Alpha and is continuing to invest in it."

As a sign of this commitment, Compaq is replacing MIPS processors with the 21264 in its high-end Tandem servers.

Inside the 21264

The 21264 is not merely an incremental update; it is a significant architectural departure from the 21164.

Key Technical Enhancements:

• Expanded primary caches
• Increased number of functional units
• Improved branch prediction accuracy
• Introduction of Motion Video Instructions (MVI)
• Enhanced bus bandwidth

In terms of raw throughput, the chip is designed to execute up to six instructions per clock cycle, though it typically sustains four.

// Conceptual representation of 21264 throughput
while (cpu_cycle) {
    execute_instruction(1);
    execute_instruction(2);
    execute_instruction(3);
    execute_instruction(4); // Sustained rate
    execute_instruction(5); // Peak potential
    execute_instruction(6); // Peak potential
}

If the Alpha can navigate these corporate transitions, it remains a formidable challenger for performance supremacy over the next decade.