Project Oberon: Transitioning from RISC-5 to RISC-V

This project represents a strategic migration of the Project Oberon System. It shifts the foundation from the Oberon-07 language to the more widely adopted Oberon-90, utilizing a modern OP2 compiler equipped with a RV32 (RISC-V) backend.

To facilitate this, the repository provides a Virtual Machine (VM) that closely mirrors the hardware described in Niklaus Wirth's Project Oberon Book. This VM is derived from a streamlined RV32 emulator, stripped down to its interpreter and augmented with custom machine and peripheral implementations. Because the memory map is a 1:1 reproduction of Wirth's original specifications, critical modules such as Kernel.Mod, Display.Mod, and Input.Mod remain entirely untouched.

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📚 Understanding the Project Oberon System (2013)

Between 1986 and 1989, Niklaus Wirth and Jürg Gutknecht (ETH Zürich) developed a comprehensive computing environment. This included the OS, the compiler, the language, and various editors. Their work was meticulously detailed in the 1992 publication, Project Oberon - The Design of an Operating System and Compiler.

Evolution of the System

The original sources found at projectoberon.net utilize Oberon-07, which represents Wirth's most aggressive effort to simplify the language. A revised version of the book was released in 2013, maintaining the original goal:

"to provide a single book that serves as an example of a system that exists, is in actual use, and is explained in all detail."

Hardware Transitions

The hardware evolution of the project can be summarized as follows: National Semiconductor NS32032 $\rightarrow$ RISC-5

Wirth moved away from the NS32032 because it was no longer available and its architecture was outdated. To maintain "simplicity and regularity" in hardware, he designed the RISC-5 processor, implementing it via an FPGA (specifically a Xilinx Spartan-3 with 1 MB of static RAM).

Key Technical Achievements of the 2013 Version:

• Full Transparency: Both software and hardware are rigorously documented.
• Verilog Implementation: Hardware modules are available as Verilog code.
• High-Level Drivers: Due to the simplicity of the ISA, assembly was replaced by Oberon for everything from raster operations to device drivers.
• Pure Lineage: Based on the original Ceres version, avoiding later "embellishments."

The "contract" between the hardware and software is elegantly simple: $\text{Contract} = \text{Memory Map} + \text{Instruction Set}$

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🚀 The Logic Behind the Migration

While the names are similar, the kinship between RISC-5 and RISC-V is rooted in a shared design philosophy. RISC-V (born at UC Berkeley circa 2010) is the fifth in a line of Berkeley RISC architectures.

Comparison of Architectures

Migrating to RISC-V is a pragmatic choice to bring Oberon to modern, accessible hardware. For instance, the ESP32-P4-PC (by Olimex) is an ideal target because the Oberon system does not require a Memory Management Unit (MMU).

The Compilation Pipeline

Instead of modifying Wirth's OR compiler, this project employs the OP2 compiler. OP2 is a descendant of the ETH Oberon heritage and features a decoupled front-end and back-end.

OP2 Backend History:

• SPARC $\rightarrow$ MIPS $\rightarrow$ i386 $\rightarrow$ ARMv7 $\rightarrow$ RV32

By moving to the 1990 language specification, the author can use a single compiler for multiple migrated systems while keeping the source code recognizable compared to the original book.

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🛠 Technical Implementation & Roadmap

The current system architecture can be visualized as follows:

Current Status and Future Goals

The system currently runs on an emulated machine to simplify debugging and maintain alignment with the textbook.

• Migrate Oberon-07 to Oberon-90
• Implement RV32 backend for OP2
• Create 1:1 Memory Map VM
• Port to Olimex ESP32-P4-PC hardware
• Migrate System 3 to Olimex hardware

Build Process

To compile the system, the project utilizes a shell script:

# Example build command
./build.sh

The repository structure includes directories for apps, files, vm, and tools, along with .obpro project files for various system components.