CPython Now Officially Supports RISC-V

By Stan Ulbrych | August 24, 2026

"I am thrilled to announce that RISC-V is now officially supported by CPython as a tier 3 platform!"

After several months of dedicated effort to enhance CPython's compatibility with the RISC-V architecture, the project has reached a significant milestone. Unlike the proprietary instruction sets we often rely on—such as x86 or ARM—RISC-V is an open standard, meaning it can be implemented by any entity.

The Growth of the Ecosystem

The adoption of RISC-V has accelerated rapidly. Projections suggest that its ecosystem will expand significantly over the next few years. Mathematically, we can represent this projected growth as:

$\text{Ecosystem Size}_{2032} \approx 4 \times \text{Ecosystem Size}_{2024}$

Because of this trajectory, ensuring that Python operates reliably on these platforms has become a priority.

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The Path to Official Support

This achievement was not a solo effort; it was driven by extensive community collaboration. The journey involved:

• Testing on physical hardware.
• Resolving architecture-specific bugs.
• Refining the build process.
• Reviewing and submitting patches.

This collective work culminated in the platform's inclusion in PEP 11. RISC-V was previously an experimental target, but it is now a recognized tier 3 platform.

Infrastructure and Acknowledgments

A critical component of this success was the availability of real RISC-V hardware for continuous testing. The RISE Project was instrumental here, providing the machines necessary for buildbots and deep debugging.

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Future Roadmap

While achieving tier 3 status is a victory, the work is far from finished. The goal is to move from basic support to high-performance optimization.

Immediate and Long-term Goals

• Integrate RISC-V into CPython's CI: By utilizing the RISE RISC-V Runners initiative, contributors will receive faster feedback on patches before they are merged, rather than waiting for buildbots.
• Elevate to Tier 2: Move the platform up the support hierarchy.
• Performance Tuning: Explore specific RISC-V capabilities to optimize CPython's execution speed.

To get started with a build, a developer might use a command similar to this:

./configure --build=riscv64-unknown-linux-gnu
make -j$(nproc)

Call to Action

If you possess RISC-V hardware, the core team needs your help. Please:

1. Build and run CPython.
2. Execute your specific test suites and workloads.
3. Report any failures or regressions.

Broad testing across diverse RISC-V environments is the only way to ensure the platform is robust for everyone. Continued collaboration across compilers, tooling, and infrastructure will be the key to making RISC-V a first-class citizen in the Python world.