Can AI design circuit boards yet?
Is AI Capable of Designing Circuit Boards?
We have developed a framework to quantitatively determine if the electronic circuits generated by LLMs are actually functional and efficient.
September 4, 2026 | ⏱️ 8 min read
The recent launch of OpenAI's GPT-6 Astra sparked significant excitement, particularly the demo featuring the model interacting with KiCad to design a circuit board. While seeing electronics highlighted in a flagship release is thrilling, we aren't quite at the stage where a single prompt can generate a fully realized smartphone.
However, this demo brings a critical question to the forefront: How do we objectively evaluate the quality of AI-generated electronics?
The Gap Between Knowledge and Execution
Our findings suggest that current models possess a deeper understanding of electronics than their performance in standard CAD tools suggests. They have ingested a massive corpus of:
- Technical textbooks
- Component datasheets
- Application notes
- Extensive codebases
The problem lies in the interface. When an agent uses a graphical CAD tool, it wastes significant "cognitive" effort on clicking buttons and tracking screen coordinates. Much of the model's context window becomes cluttered with menu states and X/Y coordinates.
Conversely, when circuits are treated as declarative code, the agent can interact directly with:
- Electrical constraints
- Component selection
- Netlist connections
By working in code, the agent can modify a design, execute a simulation, and analyze failures within a single loop. This approach shifts the benchmark's focus from computer proficiency to electronic engineering proficiency.
Example snippet from an EEBench task in ato v2:
(define-net vhold.lv
(component cap_c1 (value 545uF) (dielectric X7R))
(constraint (min-voltage 3.0V) (hold-time 20ms)))
The Complexity of the Physical World
Real-world engineering is rarely about ideal values. Consider one of our public tasks: The Residential Energy Meter.
The Requirement
When the primary supply fails, the system must maintain power to the processor for at least to ensure data is saved.
Design Constraints:
- Maintain voltage above the brownout threshold.
- Minimize cost and physical footprint.
- Ensure rapid recharge upon power restoration.
Most models instinctively suggest adding a capacitor. However, they often overlook the voltage coefficient of ceramic capacitors—where actual capacitance drops as DC voltage increases.
Simulation Failure Report: The protected rail began at but plummeted below the limit after only . Despite the code compiling successfully, the hardware failed the mission.
At a bias of , the grader detected only of effective capacitance, failing to meet the required .
Advanced Analog Challenges
For more difficult tasks, agents must synthesize complex components, such as a multiple-feedback low-pass filter using an op-amp. This requires:
- Calculating resistor/capacitor ratios for specific poles.
- Maintaining gain, cutoff frequency, and factor.
- Ensuring stability across worst-case tolerance corners.
The EEBench harness automates this by rebuilding the SPICE deck for these corners, capturing AC/transient data, and comparing results against strict upper and lower specification limits.
Engineering as a Game of Trade-offs
True electrical engineering isn't just about solving equations; it's about managing trade-offs. EEBench utilizes actual manufacturer parts with specifications pulled directly from datasheets into SPICE models.
The AI must balance:
This forces the model to move beyond textbook ideals and select parts that are actually orderable and economically viable.
How the Grading Pipeline Works
The EEBench evaluation process is entirely deterministic. The workflow follows this logic:
Similar to how a coding agent is tested via a compiler and unit tests, EEBench tests the "code" of a circuit by measuring virtual voltages and component behaviors. While EEBench V1 focuses on analog and digital simulation, it does not yet evaluate physical PCB layout or manufacturing "bring-up."
Current Leaderboard Trends
The results from September 1st indicate that models are performing significantly better than we anticipated a few months ago.
| Rank | Model | Score (%) |
|---|---|---|
| 1 | Claude Opus 5 | 61.6% |
| 2 | Grok 4.6 | 57.1% |
| 3 | Claude Fable 5.1 | 56.4% |
| 4 | Claude Fable 5 | 54.3% |
| 5 | Claude Opus 4.8 Max | 51.4% |
Notably, xAI has integrated EEBench into the Grok 4.6 model card under "engineering acceleration," reporting a score of when utilizing xhigh reasoning effort.