Zettascale (YC S24) Is Hiring ASIC/FPGA Engineers to Build Chips for ASI
Zettascale (YC S24) Recruitment: Engineering the Future of ASI
Zettascale, a member of the YC S24 cohort, is currently seeking talented ASIC/FPGA Engineers. Their primary objective is the development of specialized hardware designed to power Artificial Super Intelligence (ASI).
🎯 The Mission
The company is operating at a scale defined by the prefix "Zetta," which mathematically represents:
🛠️ Opportunities & Requirements
| Role | Primary Focus | Target Outcome |
|---|---|---|
| ASIC Engineer | Custom Silicon Design | High-efficiency ASI Hardware |
| FPGA Engineer | Programmable Logic | Rapid Prototyping & Iteration |
"We are always looking for exceptional people."
How to Apply:
- Browse the current Open Roles.
-
Send a generic resumePrepare a tangible demo. - Submit your work to the team.
If you do not see a specific position that fits your profile, Zettascale encourages proactive outreach. Instead of a standard application, they want to see a demo of a project you have built and are particularly proud of.
Contact: careers@zscc.ai
🚀 Application Workflow
💻 Example of a "Proud Build"
While the team wants your unique work, a submission might look like a sophisticated hardware description or a performance optimization script:
// Simplified example of a hardware module for ASI acceleration
module ASI_Accelerator (
input clk,
input reset,
input [255:0] data_in,
output reg [255:0] data_out
);
always @(posedge clk) begin
if (!reset)
data_out <= data_in * 2; // Placeholder for complex ASI logic
end
endmodule
Join Zettascale in building the silicon foundation for the next era of intelligence.