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How OpenAI Used Its Own LLMs to Design Its Jalapeño Chip

Original article
spectrum.ieee.org|178 points|123 comments|by maxall4|Sep 18, 2026

The Silicon Evolution: How OpenAI Leveraged LLMs to Forge the "Jalapeño" Chip

On August 25, OpenAI pulled back the curtain on its inaugural AI accelerator, aptly named Jalapeño. While the hardware itself is a powerhouse, the method of its creation is perhaps more revolutionary than the silicon it's printed on.

🚀 Technical Specifications & Performance

The Jalapeño chip is engineered for extreme throughput and efficiency. Its architecture consists of a primary compute die integrated with an I/O chiplet and six stacks of HBM4 (High Bandwidth Memory).

Hardware Breakdown

FeatureSpecification
Compute PowerUp to 13.4 Petaflops13.4 \text{ Petaflops}13.4 Petaflops (4-bit)
Memory Capacity232 GB232 \text{ GB}232 GB
Memory Bandwidth15.4 TB/s15.4 \text{ TB/s}15.4 TB/s
Memory TypeHBM4 (6 stacks)

When measured against the Nvidia GB300—the current industry workhorse OpenAI relies upon—the Jalapeño shows significant promise. OpenAI reports that the chip can slash end-to-end latency (the duration from the initial prompt to the final token) by as much as 3.6x, all while maintaining a lower power profile.

Close-up of a computer processor consisting of several pieces of silicon.


⚡ The "AI-Accelerated" Design Process

The most striking aspect of Jalapeño is the speed of its development. OpenAI didn't just build an AI chip; they used their own Large Language Models (LLMs) to design it.

Traditional chip design takes years of iterative manual labor. Instead, OpenAI achieved:

  • Concept to Silicon: Under 20 months.
  • RTL to Tape-out: Only 9 months.

"The models are giving superpowers to our engineers," claims Richard Ho, OpenAI's VP of Hardware. "They can explore a lot more paths."

Design Milestones

  • Initial Architecture Concept
  • RTL (Register-Transfer Level) logic definition
  • Physical Design & Implementation
  • Tape-out (Manufacturing hand-off)
  • Widespread deployment in inference fleet

To visualize the workflow, consider this simplified logic flow:

def design_chip(concept):
    while not tape_out_ready:
        iteration = llm_optimize(concept)
        if verify_logic(iteration):
            concept = iteration
        if concept.meets_specs():
            tape_out_ready = True
    return "Jalapeño Silicon"

🤝 The Partnership: OpenAI & Broadcom

Despite the "superpowers" provided by LLMs, OpenAI didn't work in a vacuum. They partnered with Broadcom to bridge the gap between theoretical design and physical reality.

The Human Element

The internal OpenAI team remained lean, averaging fewer than 100 people throughout the project. This multidisciplinary group covered everything from supply chain management to software and system architecture.

However, some industry observers suggest that the "AI magic" might be overstated. David Chin, co-founder of the agentic design startup Verkor.io, notes that while the timeline is believable, Broadcom's expertise was likely the critical factor.

"The schedule they gave us is quite credible," Chin says, but emphasizes that Broadcom's involvement was essential to hitting those rapid marks.

Humanoid robots and people walking through a modern city street with glass buildings.

🔮 Looking Ahead

As OpenAI moves toward second and third-generation designs, the integration of LLMs into the hardware pipeline is expected to deepen. If the Jalapeño serves as a proof-of-concept, the window between idea and silicon will only continue to shrink, potentially disrupting the traditional semiconductor development cycle forever.