Decoding Brain Connectivity: The Advent of the Neural LogSync Chip

Researchers at EPFL have engineered a groundbreaking implantable neural chip designed to monitor the dialogue between disparate brain regions. This technology allows for the real-time identification of emotional and cognitive states, marking a significant leap in neurotechnology.

The Evolution of Neuromodulation

Deep Brain Stimulation (DBS) involves the use of implants to deliver electrical pulses to specific neural targets to regulate activity. While highly effective for movement-related issues like Parkinson’s disease, it is now being pivoted toward severe psychiatric conditions, such as:

• Major Depressive Disorder
• Post-Traumatic Stress Disorder (PTSD)
• Obsessive-Compulsive Disorder (OCD)

The Limitation of Current Systems

Historically, DBS has suffered from a lack of adaptability. The transition in technology can be viewed as follows:

Open-Loop Systems (Fixed Settings) $\rightarrow$ Single-Region Closed-Loop Systems $\rightarrow$ Network-Level Adaptive Systems

"Our work is based on the growing body of research suggesting that psychiatric disorders arise more from disruptions in communication between brain regions than from dysfunction of any single region," explains Mahsa Shoaran, head of the Integrated Neurotechnologies Lab.

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Introducing LogSync: A System-on-Chip (SoC)

The team developed LogSync, a low-power SoC that doesn't just record activity but extracts specific biomarkers. These biomarkers measure the intensity of brain wave oscillations and the synchrony between different neural sites.

How it Works

The process follows a sophisticated pipeline from raw data to therapeutic action:

Technical Specifications & Innovation

To make the chip viable for implantation, the team focused on extreme power efficiency. The power consumption is kept below: $\text{Power} < 200\ \mu\text{W}$

This was achieved through co-design, where hardware and algorithms were developed simultaneously. A key innovation is the use of logarithmic computations, which simplify the heavy mathematical lifting required for real-time network analysis.

# Conceptual logic of LogSync trigger
def check_brain_state(synchrony_level, threshold):
    if synchrony_level > threshold:
        return "TRIGGER_STIMULATION"
    else:
        return "MONITOR_ONLY"

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Validation and Results

The efficacy of LogSync was tested using a dual-pronged approach:

1. Human Data Analysis: Using recordings from previous psychiatric studies, the chip's algorithm successfully distinguished between:
   • Cognitive engagement (during mental tasks).
   • Emotional arousal (while viewing video clips).
2. Animal Testing: In trials with rats at the University of Minnesota, the implant tracked oscillations and triggered stimulation at precise phases of neural activity.

Project Milestones

• Develop low-power logarithmic SoC
• Extract cross-regional synchrony biomarkers
• Validate via human psychiatric datasets
• Demonstrate real-time triggering in rat models
• Transition to full clinical human trials

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Broader Impact and Future Horizons

While the primary focus is psychiatric care, the ability to trigger stimulation based on network biomarkers is applicable to:

• Adaptive DBS for movement disorders.
• Non-invasive closed-loop stimulation.
• Focused-ultrasound interfaces.

Beyond Predefined Biomarkers

The lab is currently advancing toward self-supervised learning. Their work presented at ICML 2026 focuses on capturing neural activity across time, channels, and regions without relying on predefined markers. This research is being commercialized through Infera Neuro, an EPFL spin-off.

The LogSync chip, measuring approximately 4x2 mm.

Funding and References

This research was supported by a CHF 6.6 million grant from the US National Institute for Mental Health (NIMH) and an ERC Starting Grant via the Swiss State Secretariat for Education, Research, and Innovation (SERI).

Key Publications:

• D. Alex et al., "LogSync: A Low-Power Logarithmic SoC...", IEEE Journal of Solid-State Circuits (JSSC), Sept 2026.
• Shoaran, "RECTOR: Masked Region-Channel-Temporal Modeling...", ICML, 2026.
• D. Alex et al., "A 32-Channel 196-$\mu$W Logarithmic SoC...", VLSI Technology and Circuits, 2025.